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IS65LV256AL IS62LV256AL
32K x 8 LOW VOLTAGE CMOS STATIC RAM
FEATURES
* High-speed access time: 20, 45 ns * Automatic power-down when chip is deselected * CMOS low power operation -- 17 W (typical) CMOS standby -- 50 mW (typical) operating * TTL compatible interface levels * Single 3.3V power supply * Fully static operation: no clock or refresh required * Three-state outputs * Industrial and Automotive temperatures available * Lead-free available
ISSI
MARCH 2006
(R)
DESCRIPTION The ISSI IS62/65LV256AL is a very high-speed, low
power, 32,768-word by 8-bit static RAM. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 15 ns maximum. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation is reduced to 150 W (typical) with CMOS input levels. Easy memory expansion is provided by using an active LOW Chip Enable (CE). The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62/65LV256AL is available in the JEDEC standard 28-pin SOJ, 28-pin SOP, and the 28-pin 450-mil TSOP package.
FUNCTIONAL BLOCK DIAGRAM
A0-A14
DECODER
32K x 8 MEMORY ARRAY
VDD GND I/O DATA CIRCUIT
I/O0-I/O7
COLUMN I/O
CE OE WE CONTROL CIRCUIT
Copyright (c) 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. A 03/17/06
1
IS65LV256AL IS62LV256AL
PIN CONFIGURATION
28-Pin SOJ/ 28-pin SOP
A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VDD WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3
ISSI
PIN CONFIGURATION
28-Pin TSOP
OE A11 A9 A8 A13 WE VDD A14 A12 A7 A6 A5 A4 A3 22 23 24 25 26 27 28 1 2 3 4 5 6 7 21 20 19 18 17 16 15 14 13 12 11 10 9 8
(R)
A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2
PIN DESCRIPTIONS
A0-A14 CE OE WE I/O0-I/O7 VDD GND Address Inputs Chip Enable Input Output Enable Input Write Enable Input Input/Output Power Ground
TRUTH TABLE
Mode Not Selected (Power-down) Output Disabled Read Write WE X H H L CE H L L L OE X H L X I/O Operation High-Z High-Z DOUT DIN VDD Current ISB1, ISB2 ICC1, ICC2 ICC1, ICC2 ICC1, ICC2
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM TBIAS TSTG PT IOUT Parameter Terminal Voltage with Respect to GND Temperature Under Bias Storage Temperature Power Dissipation DC Output Current (LOW) Value -0.5 to +4.6 -55 to +125 -65 to +150 0.5 20 Unit V C C W mA
Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. A 03/17/06
IS65LV256AL IS62LV256AL
OPERATING RANGE
Part No. IS62LV256AL IS62LV256AL IS65LV256AL Range Commercial Industrial Automotive Ambient Temperature 0C to +70C -40C to +85C -40C to +125C VDD 3.3V +10% 3.3V 10% 3.3V 10%
ISSI
(R)
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol VOH VOL VIH VIL ILI Parameter Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage
(1)
Test Conditions VDD = Min., IOH = -2.0 mA VDD = Min., IOL = 4.0 mA
Min. 2.4 -- 2.2 -0.3
Max. -- 0.4 VDD + 0.3 0.8 1 2 10 1 2 10
Unit V V V V A
GND VIN VDD
Com. Ind. Auto. Com. Ind. Auto.
-1 -2 -10 -1 -2 -10
ILO
Output Leakage
GND VOUT VDD, Outputs Disabled
A
Notes: 1. VIL = -3.0V for pulse width less than 10 ns. 2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. A 03/17/06
3
IS65LV256AL IS62LV256AL
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter ICC1 VDD Operating Supply Current VDD Dynamic Operating Supply Current Test Conditions VDD = Max., CE = VIL IOUT = 0 mA, f = 1 MHz VDD = Max., CE = VIL IOUT = 0 mA, f = fMAX Com. Ind. Auto. Com. Ind. Auto. typ.(2) Com. Ind. Auto. Com. Ind. Auto. typ.(2) -20 ns Min. Max. -- -- -- -- -- -- 15 -- -- -- -- -- -- 2 1.5 1.8 -- 15 20 -- -- -- -- -- -- -- 2 4 5 -- 20 25 -- -45 ns Min. Max. -- -- -- -- -- -- 7 1.5 1.8 2 15 20 50 4 5 8 10 12 20
ISSI
Unit mA
(R)
ICC2
mA
ISB1
TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs)
VDD = Max., VIN = VIH or VIL CE VIH, f = 0 VDD = Max., CE VDD - 0.2V, VIN > VDD - 0.2V, or VIN 0.2V, f = 0
mA
ISB2
A
Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. 2. Typical values are measured at VDD = 3.3V, TA = 25oC and not 100% tested.
CAPACITANCE(1,2)
Symbol CIN COUT Parameter Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 6 5 Unit pF pF
Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25C, f = 1 MHz, VDD = 3.3V.
4
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. A 03/17/06
IS65LV256AL IS62LV256AL
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter Read Cycle Time Address Access Time Output Hold Time CE Access Time OE Access Time
(2) (2)
ISSI
-20 ns Min. Max. 20 -- 2 -- -- 0 -- 3 -- 0 -- -- 20 -- 20 10 -- 9 -- 9 -- 18 -45 ns Min. Max. 45 -- 2 -- -- 0 0 3 0 0 -- -- 45 -- 45 25 -- 20 -- 20 -- 30 Unit ns ns ns ns ns ns ns ns ns ns ns
(R)
tRC tAA tOHA tACE tDOE tLZOE tLZCE tPU tPD
(3) (3)
OE to Low-Z Output OE to High-Z Output CE to Low-Z Output CE to High-Z Output CE to Power-Up CE to Power-Down
tHZOE
(2)
tHZCE(2)
Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested. 3. Not 100% tested.
AC TEST CONDITIONS
Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Levels Output Load Unit 0V to 3.0V 3 ns 1.5V See Figures 1 and 2
AC TEST LOADS
635 3.3V 3.3V 635
OUTPUT 30 pF Including jig and scope 702
OUTPUT 5 pF Including jig and scope 702
Figure 1.
Figure 2.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. A 03/17/06
5
IS65LV256AL IS62LV256AL
AC WAVEFORMS READ CYCLE NO. 1(1,2)
tRC
ISSI
(R)
ADDRESS
tAA tOHA tOHA
DATA VALID
DOUT
READ CYCLE NO. 2(1,3)
tRC
ADDRESS
tAA tOHA
OE
tDOE tHZOE
CE
tACE tLZCE
tLZOE
tHZCE
DATA VALID
DOUT
HIGH-Z
tPU
tPD
50% 50%
ICC
SUPPLY CURRENT
ISB
Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE = VIL. 3. Address is valid prior to or coincident with CE LOW transitions.
6
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. A 03/17/06
IS65LV256AL IS62LV256AL
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
Symbol Parameter Write Cycle Time CE to Write End Address Setup Time to Write End Address Hold from Write End Address Setup Time
(4)
ISSI
-20 ns Min. Max. 20 15 14 0 0 14 13 0 -- 0 -- -- -- -- -- -- -- -- 8 -- -45 ns Min. Max. 45 35 25 0 0 25 20 0 -- 0 -- -- -- -- -- -- -- -- 20 -- Unit ns ns ns ns ns ns ns ns ns ns
(R)
tWC tSCE tAW tHA tSA tPWE tSD tHD tHZWE(2) tLZWE
(2)
WE Pulse Width Data Setup to Write End Data Hold from Write End WE LOW to High-Z Output WE HIGH to Low-Z Output
Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 4. Tested with OE HIGH.
AC WAVEFORMS WE WRITE CYCLE NO. 1 (WE Controlled)(1,2)
tWC
ADDRESS
tSCE tHA
CE
tAW
WE
tSA tHZWE
tPWE tLZWE
HIGH-Z
DOUT
DATA UNDEFINED
tSD
tHD
DIN
DATA-IN VALID
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. A 03/17/06
7
IS65LV256AL IS62LV256AL
WRITE CYCLE NO. 2 (CE Controlled)(1,2) CE
tWC
ISSI
tSA tSCE tHA
(R)
ADDRESS
CE
tAW tPWE
WE
tHZWE tLZWE
HIGH-Z
DOUT
DATA UNDEFINED
tSD
tHD
DIN
DATA-IN VALID
Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE VIH.
8
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. A 03/17/06
IS65LV256AL IS62LV256AL
DATA RETENTION SWITCHING CHARACTERISTICS
Symbol Parameter Test Condition See Data Retention Waveform VDD = 2.0V, CE VDD - 0.2V VIN VDD - 0.2V, or VIN VSS + 0.2V Com. Ind. Auto. typ.(1) Min. 2.0 -- -- -- 0 -- -- -- 2 Typ.
ISSI
Max. 3.6 15 20 50 -- -- Unit V A
(R)
VDR
IDR
VDD for Data Retention Data Retention Current
tSDR tRDR
Note:
Data Retention Setup Time See Data Retention Waveform Recovery Time See Data Retention Waveform
ns ns
tRC
1. Typical Values are measured at VDD = 3.3V, TA = 25oC and not 100% tested.
DATA RETENTION WAVEFORM (CE Controlled) CE
tSDR VDD Data Retention Mode tRDR
VDR CE VDD - 0.2V
CE GND
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. A 03/17/06
9
IS65LV256AL IS62LV256AL
ISSI
Package 450-mil 450-mil 300-mil 300-mil TSOP TSOP, Lead-free Plastic SOJ Plastic SOJ, Lead-free
(R)
ORDERING INFORMATION Commercial Range: 0C to +70C
Speed (ns) 20 Order Part No. IS62LV256AL-20T IS62LV256AL-20TL IS62LV256AL-20J IS62LV256AL-20JL IS62LV256AL-45T IS62LV256AL-45TL IS62LV256AL-45J
45
450-mil TSOP 450-mil TSOP, Lead-free 300-mil Plastic SOJ
Industrial Range: -40C to +85C
Speed (ns) 20 Order Part No. IS62LV256AL-20TI IS62LV256AL-20TLI IS62LV256AL-20JI IS62LV256AL-20JLI IS62LV256AL-45TI IS62LV256AL-45TLI IS62LV256AL-45JI IS62LV256AL-45UI IS62LV256AL-45ULI Package 450-mil 450-mil 300-mil 300-mil TSOP TSOP, Lead-free Plastic SOJ Plastic SOJ, Lead-free
45
450-mil TSOP 450-mil TSOP, Lead-free 300-mil Plastic SOJ 330-mil Plastic SOP 330-mil Plastic SOP, Lead-free
Automotive Range: -40C to +125C
Speed (ns) 45 Order Part No. IS65LV256AL-45TA3 IS65LV256AL-45TLA3 IS65LV256AL-45UA3 IS65LV256AL-45ULA3 Package 450-mil 450-mil 330-mil 330-mil TSOP TSOP, Lead-free Plastic SOP Plastic SOP, Lead-free
10
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. A 03/17/06
PACKAGING INFORMATION
Plastic TSOP - 28-pins Package Code: T (Type I)
1
ISSI
(R)
E
H
N D
SEATING PLANE
S
A
e
B
L A1
C
Symbol Ref. Std. No. Leads A A1 B C D E H e L
Plastic TSOP (T--Type I) Millimeters Inches Min Max Min Max 28 1.00 1.20 0.05 0.20 0.16 0.27 0.10 0.20 7.90 8.10 11.70 11.90 13.20 13.60 0.55 BSC 0.30 0.70 0 5 0.037 0.047 0.002 0.008 0.006 0.011 0.004 0.008 0.308 0.316 0.456 0.465 0.515 0.531 0.022 BSC 0.011 0.027 0 5
Notes: 1. Controlling dimension: millimeters, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E do not include mold flash protrusions and
should be measured from the bottom of the package.
4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
Integrated Silicon Solution, Inc.
PK13197T28 Rev. B 01/31/97
PACKAGING INFORMATION
300-mil Plastic SOJ Package Code: J
N
ISSI
(R)
E1
E
1
D A
SEATING PLANE
B
A2 C
e
b
A1
E2
MILLIMETERS Sym.
N0. Leads A A1 A2 b B C D E E1 E2 e -- 0.64 2.41 0.41 0.66 0.20 17.02 8.26 7.49 6.27
INCHES Min. Typ. Max.
Min. Typ. Max.
24/26 -- -- -- -- -- -- -- -- -- -- 3.56 -- 2.67 0.51 0.81 0.25 17.27 8.76 7.75 7.29
Notes: 1. Controlling dimension: inches, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of
the package.
4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
-- 0.025 0.095 0.016 0.026 0.008 0.670 0.325 0.295 0.247
-- 0.140 -- -- -- -- -- -- -- -- -- -- 0.105 0.020 0.032 0.010 0.680 0.345 0.305 0.287
1.27 BSC
0.050 BSC
Copyright (c) 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 02/25/03
PACKAGING INFORMATION
300-mil Plastic SOJ Package Code: J
ISSI
(R)
MILLIMETERS Sym.
N0. Leads A A1 A2 b B C D E E1 E2 e -- 0.64 2.41 0.41 0.66 0.20 18.29 8.26 7.49 6.27
INCHES Min. Typ. Max. Sym.
N0. Leads
MILLIMETERS Min. Typ. Max.
32 -- 0.64 2.41 0.41 0.66 0.20 20.83 8.26 7.49 6.27 -- -- -- -- -- -- -- -- -- -- 3.56 -- 2.67 0.51 0.81 0.25 21.08 8.76 7.75 7.29 --
INCHES Min. Typ. Max.
Min. Typ. Max.
28 -- -- -- -- -- -- -- -- -- -- 3.56 -- 2.67 0.51 0.81 0.25 18.54 8.76 7.75 7.29
-- 0.025 0.095 0.016 0.026 0.008 0.720 0.325 0.295 0.247
-- -- -- -- -- -- -- -- -- --
0.140 -- 0.105 0.020 0.032 0.010 0.730 0.345 0.305 0.287
A A1 A2 b B C D E E1 E2 e
-- -- -- -- -- -- -- -- -- --
0.140 -- 0.105 0.020 0.032 0.010 0.830 0.345 0.305 0.287
0.025 0.095 0.016 0.026 0.008 0.820 0.325 0.295 0.247
1.27 BSC
0.050 BSC
1.27 BSC
0.050 BSC
2
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 02/25/03
PACKAGING INFORMATION
330-mil Plastic SOP Package Code: U (28-pin)
N
ISSI
(R)
E1
E
1 D
SEATING PLANE
S
A
h x 45o
e
B
L A1
C
MILLIMETERS Sym. A A1 B C D E E1 e h L S Min. 28 2.84 -- 0.51 -- 18.24 12.12 8.53 0.51 1.14 8
o
INCHES Min. 28 -- 0.004 0.014 0.010 0.708 0.453 0.326 0.012 0.028 0
o
Max.
Max. 0.112 -- 0.020 -- 0.718 0.477 0.336 0.020 0.045 8o 0.047
No. Leads -- 0.10 0.36 0.25
Notes: 1. Controlling dimension: inches, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
17.98 11.51 8.28 0.30 0.71 0
o
1.27 BSC
0.050 BSC
0.58
1.19
0.023
Copyright (c) 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. C 02/26/03

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